I. Field of the Disclosure
The technology of the disclosure relates generally to shared cache memory systems, and, in particular, to measuring usage of shared caches.
II. Background
An increasing number of computer hardware units (e.g., central processing units (CPUs), graphics processing units (GPUs), digital signal processing (DSP) units, and/or direct memory access (DMA) engines, as non-limiting examples) are configured to share memory system resources such as caches, memory, interconnect bandwidth, and cache bandwidth. Resource interference and conflicts between computer hardware units could result in negative consequences, such as missing a real-time deadline on a mobile System-on-Chip (SoC), or violating a Service Level Agreement (SLA) on a consolidated server, as non-limiting examples. Additionally, reference streams associated with some computer hardware units may have little temporal locality, leading to cache pollution and a negative impact on overall performance if left unchecked. Accordingly, monitoring the effects of resource sharing has become more important to achieving optimal system performance. In this regard, it may be desirable for users to have the ability to monitor the usage of shared resources.
However, conventional cache memory systems do not provide a space-efficient mechanism for monitoring cache usage. As a result, such conventional cache memory systems may remain underutilized to protect against worst case performance in the presence of cache interference. Moreover, a lack of feedback regarding cache occupancy may result in computer processing systems being unable to provide optimal scheduling of system tasks.